Our Team
Myeongjin Kang (Ph.D. 2025) Agency for Defense Development (ADD) Senior Researcher
Brief Bio Sketch
Mr. Kang received his B.S. degree in Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea in 2020. He received his Ph.D. in the School of Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea in 2025. His research interests include Embedded low-power action with Hue-based algorithms and Parallelized ECC Blocks. Currently, he is focusing on low-power robust processor architectures with ECC protection units. In the future, he will focus on various ways to optimize a processor's low-power, stable action. [Homepage] Google Scholar [About]
Selected Publications
Myeongjin Kang and Daejin Park. Lightweight Microcontroller with Parallelized ECC-based Code Memory Protection Unit for Robust Instruction Execution in Smart Sensors (SCI) Sensors, 2021.
Juneseo Chang, Myeongjin Kang, and Daejin Park. Low-Power On-Chip Implementation of Enhanced SVM Algorithm for Sensors Fusion-based Activity Classification in Lightweighted Edge Devices (SCI) Electronics, 11(1):139-159, 2022.
Myeongjin Kang, Ho Kim, Jungwon Park, Seongbum Yang, Junseo Yun, and Daejin Park. Low-Power Streamable AI Software Runtime Execution based on Collaborative Edge-Cloud Image Processing in Metaverse Applications (KCI) Journal of the Korea Institute of Information and Communication Engineering, 26(11):1577-1585, 2022.
Myeongjin Kang and Daejin Park. Cloud Memory Enabled Code Generation via Online Computing for Seamless Edge AI Operation In IEEE COMPSAC 2024, 2024.
Seongho Cho (Ph.D. Student @ KNU / Senior Researcher @ LG Display)
Brief Bio Sketch
Mr. Cho is now with LG Display as a senior researcher, developing display and touch device controllers including F/W for automotive electronics. He is pursuing his Ph.D. degree in the School of Electronics Engineering at Kyungpook National University, Daegu, Korea. He has worked on circuit design and performance verification for capacitive-type in-cell touch systems from 2012 to 2018. His research interests include robust circuit design and highly reliable, low-power self-diagnostic architectures for automotive display devices aligned with ASIL standards. [Google Scholar] [About]
Selected Publications
Seongho Cho, Sejong Oh, and Daejin Park. Robust Intra-Body Communication using SHA-ECC-CRC Inversion-based Frequency Shift Keying for Securing Electronic Authentication (SCI) Sensors, 2020.
Seongho Cho and Daejin Park. Electrostatic Coupling Intra-Body Communication Based on FSK Communication and Error Correction (KCI) IEMEK Journal of Embedded Systems and Applications, 15(4):159-166, 2020.
Sungho Cho and Daejin Park. Automatic Importance Sampling Points Extraction for Anti-Aliasing Event Signal Processing (Under Review) In IEEE ICCE-TW 2025, 2025.
Heuijee Yun (Integrated Ph.D. Candidate)
Brief Bio Sketch
Ms. Yun received her B.S. Degree in Electronics Engineering at Kyungpook National University, Daegu, Korea in 2022. She is currently an Integrated Ph.D. student in the School of Electronic and Electrical Engineering at Kyungpook National University. Her research interests include image processing implemented on lightweight embedded boards, real-world autonomous driving simulations, and combining camera and LiDAR data with deep neural networks for accurate object recognition. She is also researching low-power algorithm optimization for ADAS hardware accelerators, including SNN and SSL frameworks. [Homepage] Google Scholar [About]
Selected Publications
Heuijee Yun and Daejin Park. Efficient Object Detection based on Masking Semantic Segmentation Region for Lightweight Embedded Processors (SCI) Sensors, 22(22):8890-8911, 2022.
Heuijee Yun and Daejin Park. Low-Power Lane Detection Unit with Sliding-based Parallel Segment Detection Accelerator for Lightweighted Automotive Microcontrollers (SCI) IEEE Access, 12:4339-4353, 2024.
Heuijee Youn and Daejin Park. S3A-NPU: A High-Performance Hardware Accelerator for Spiking Self-Supervised Learning with Dynamic Adaptive Memory Optimization (SCI) IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 33(7):1886-1898, 2025.
Heuijee Yun and Daejin Park. Opti-SpiSSL: A Highly Reconfigurable Hardware Generation Framework for Spiking Self-Supervised Learning on Heterogeneous SoC In IEEE Design Automation Conference (Top Tier Conf. DAC 2025), 2025.
Joonghyun An (Ph.D. Student / Principal Engineer @ Samsung Electronics)
Brief Bio Sketch
Mr. An received the M.S. degree in the School of Electronics Engineering from Kyungpook National University, Daegu, Korea, in 2017. His research interests include ultra-low power VLSI chip design for IoT-driven applications. He was a Senior Researcher at SK Hynix Semiconductor, developing ARM-based System-on-Chip setups with custom-designed VLSI circuits. He is currently pursuing his Ph.D. degree at Kyungpook National University and is concurrently with Samsung Electronics as a Principal Engineer. He has published multiple works related to robust processor architectures protecting against abnormal clock failures. [Homepage] Google Scholar [About]
Selected Publications
Joonghyun An, Moon Gi Seok, and Daejin Park. Automatic On-Chip Backup Clock Changer for Protecting Abnormal MCU Operations in Unsafe Clock Frequency IEICE Electronics Express, 13(24):20160808, 2016.
Joonghyun An and Daejin Park. Fast Adaptation Techniques of Compensation Coefficient of Active Noise Canceller using Binary Search Algorithm (KCI) Journal of the Korea Institute of Information and Communication Engineering, 25(11):1635-1641, 2021.
Junghyun An and Daejin Park. Reconfigurable Built-In Test Unit by Embedding Runtime Capture-Replay Test Vector into On-Chip SRAM (Under Review) In IEEE ICCE-TW 2025, 2025.
Sunghoon Hong (Ph.D. Student / Senior Researcher @ SYSCON Robotics)
Brief Bio Sketch
Mr. Hong received the M.S. degree in Intelligent Robot Engineering at Hanyang University, Seoul, Korea, in 2016. His main interest lies in Human-Like Autonomous Driving Systems. He has rich experience in autonomous driving technologies such as SLAM, ADAS, PID control, machine learning, path-planning, and navigation algorithms. He was a research engineer at Carnavicom Co., Ltd. and is currently pursuing his Ph.D. degree at KNU, focused on optimizing deep learning-based object detection algorithms for low-power embedded platforms. [Homepage] Google Scholar [About]
Selected Publications
Sunghoon Hong and Daejin Park. Runtime ML-DL Hybrid Inference Platform based on Multiplexing Adaptive Space-Time Resolution for Lightweight Object Detection in Low-Power Embedded Systems (SCI) Sensors, 22(8):2998-3011, 2022.
Sunghoon Hong and Daejin Park. On-Chip Realization of Efficient Lane Departure Warning Systems using Inverse Perspective Transformation and Machine Learning-based Lane Prediction (JCR 2% Top SCI) IEEE Transactions on Intelligent Transportation Systems (TITS), 2024.
Sunghoon Hong and Daejin Park. ML-Based Fast and Precise Embedded Rack Detection Software for Docking and Transport of Autonomous Mobile Robots Using 2-D LiDAR (SCI) IEEE Embedded Systems Letters, 16(4):401-404, 2024.
Yonghun Lee (Ph.D. Student / Principal Researcher @ DB Globalchips)
Brief Bio Sketch
Mr. Lee received the B.S. degree in Electronics Engineering at Jeonbuk National University, Jeonju, Korea in 2004. Mr. Lee was a research engineer at Samsung Electronics for over 16 years from 2004 to 2020, working on high-speed intra-panel interfaces and touch sensor controllers. He is currently a Ph.D. student in the School of Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea. His research interests include one-dimensional hardware acceleration and automated verification infrastructures for embedded systems. [Homepage] Google Scholar [About]
Selected Publications
Yonghun Lee and Daejin Park. Fast Verilog Simulation using Tcl-based Verification Code Generation for Dynamically Reloading from Pre-Simulation Snapshot (KCI) Journal of the Korea Institute of Information and Communication Engineering, 27(4):545-551, 2023.
Yonghun Lee and Daejin Park. In-System Test Unit Verilog RTL Generation using Capture-Replay Scheme in Dynamic Simulation (Under Review) In IEEE ICCE-TW 2025, 2025.
Yonghun Lee, Minjung Kim, and Daejin Park. TRU-Net Based AI Model Implementation by Pure C for Real-time Speech Enhancement (Best Excellent Paper Awarded) In IEEE ICAIIC 2026, 2026.
Seunghyun Park (Integrated Ph.D. Student)
Brief Bio Sketch
Mr. Park received his B.S. degree in Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea in 2023. He is currently an integrated Ph.D. student in the School of Electronic and Electrical Engineering at Kyungpook National University. His research interests include artificial intelligence (AI) accelerator architectures, low-power, small-area, high-speed accelerator circuits, tiling optimization, and design/verification methodologies for edge computing systems. [Homepage] Google Scholar [About]
Selected Publications
Seunghyun Park and Daejin Park. Low-Power FPGA Realization of Lightweight Active Noise Cancellation with CNN Noise Classification (SCI) Electronics, 12(11):2511-2526, 2023.
Seunghyun Park and Daejin Park. Low-Power Scalable TSPI: A Modular Off-Chip Network for Edge AI Accelerators (SCI) IEEE Access, 12:141448-141459, 2024.
Seunghyun Park and Daejin Park. Bit-Separable Multiplier in CNN Accelerator: Analyzing Partial Results for Post-Optimization (VLSI Top Flagship Journal, SCI) IEEE Micro, 2026.
Seunghyun Park and Daejin Park. Workload-Aware Compressor Tree Design Automation with Statistical Calibration for Efficient AI Accelerators (SCI) IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2026.
Minjung Kim (Integrated Ph.D. Student)
Brief Bio Sketch
Mr. Kim is an integrated Ph.D. student at Kyungpook National University, having progressed from the B.S. and M.S. tracks within the AI-S2oC Laboratory. His research interests focus on overcoming the physical resource limits of embedded microcontrollers through specialized software architecture, real-time deadline scheduling algorithms, multi-OS hypervisors, fault-tolerant Symmetric Multiprocessing (SMP) RTOS setups, and memory/placement optimization for neuromorphic SNN models. [Homepage] Google Scholar [About]
Selected Publications
Minjung Kim and Daejin Park. Dynamic Round Robin Scheduling based Hypervisor System for Managing Multiple Operating Systems on Lightweight Microcontrollers (KCI) Journal of the Korea Institute of Information and Communication Engineering, 2024.
Minjung Kim and Daejin Park. Ultralight Situation-Aware Hypervisor with Adaptive Starvation-Free Feedback Control for Embedded Systems (SCI) IEEE Access, 13:136643-136655, 2025.
Minjung Kim and Daejin Park. HistoExit: Histogram-Guided Fine-Tuning for Checkpointed Early-Exit Spiking Neural Networks (SCI) (Under Review) IEEE Embedded Systems Letters, 2026.
Suhwan Lee (Ph.D. Student / Senior Research Engineer @ LG Electronics)
Brief Bio Sketch
Mr. Lee is now with LG Electronics as a senior research engineer, developing embedded network software, including Wi-Fi modules installed in smart home appliances (IoT). He received his B.S. degree in Computer Engineering at Korea Maritime University in 2011 and his M.S. degree in Computer Engineering at Pusan National University in 2013. He is currently pursuing a Ph.D. degree at Kyungpook National University. His research interests cover IoT networking solutions and secure design for weak electric fields. [Homepage] Google Scholar [About]
Selected Publications
Suhwan Lee and Daejin Park. Network-based Structured Aware Collaborative IoT Devices Control using Adaptive Sensing for Edge-Cloud Traffic Reduction (Under Review) In IEEE ICCE-TW 2025, 2025.
Jongyun Byeon (M.S. Student / Junior Research Engineer @ LIG Nex1)
Brief Bio Sketch
Mr. Byeon is currently with LIG Nex1 as a junior research engineer, addressing production and operations issues for guided missile systems. He received his B.S. degree in Electronics Engineering at Pusan National University, Pusan, Korea. He is now pursuing an M.S. degree at Kyungpook National University. His research interests include secure hardware-software co-design, multi-threaded data scrambling, and optimized on-chip memory mapping. [Homepage] Google Scholar [About]
Selected Publications
Jongyun Byeon and Daejin Park. Multi-Threaded Data Scrambling Techniques using Reduced On-chip Memory for Light-weighted Embedded Systems In IEEE International Conference on ICT Convergence (ICTC 2024), 2024.
Gihyeon Jeon (M.S. Student)
Brief Bio Sketch
Mr. Jeon is currently pursuing his master's degree in Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea. His research interests range from low-level digital logic design to efficient memory management. He has designed a fast ternary ripple carry adder based on typical MOS transistors and is currently exploring scratchpad memory (SPM) allocation optimizations and compiler-enhanced dependency analysis. [Homepage] Google Scholar [About]
Selected Publications
Kihyeon Jeon and Daejin Park. Speed-Area-Power Efficient Ternary Logic Gate Implementation based on Typical MOS transistors In International Conference on Electronics, Information, and Communication (ICEIC 2024), 2024.
Gihyeon Jeon and Daejin Park. Defragmentation-based Efficient Allocation on On-Chip Scratchpad Memory for Lightweighted Microcontrollers (KCI) Journal of the Korea Institute of Information and Communication Engineering, 2024.
Gihyeon Jeon and Daejin Park. A Dynamic Linking Framework for Efficient QEMU Peripheral Development and Maintenance In IEEE ICAIIC 2025, 2025.
Hyunjung Lee (M.S. Graduate Student)
Brief Bio Sketch
Mr. Lee received his B.S. degree in Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea in 2024. He is currently pursuing his M.S. graduate degree in Electronics Engineering at Kyungpook National University. His research interests cover automotive embedded systems, multi-camera interoperable emulation frameworks, real-time advanced multi-threaded vehicle control loops, on-chip sensorless margin degradation monitoring, and reproducible ECU co-simulations. [Homepage] Google Scholar [About]
Selected Publications
Hyunjung Lee and Daejin Park. Auto Parking Assistant Control using Human-Activity Feedback-based Embedded Software Emulation (KCI) Journal of the Korea Institute of Information and Communication Engineering, 2024.
Hyunjung Lee and Daejin Park. Advanced Real-Time Performance QEMU Emulated Automotive Control System with a Multithreaded PID Controller In IEEE ICCE-TW 2025, 2025.
Hyunjung Lee and Daejin Park. Early Detection of Software-Induced Internal Margin Degradation in Automotive MCUs Using On-Chip ADC Variability In IEEE IPFA 2026, 2026.
Hyunjung Lee and Daejin Park. Command-Authority Scheduling for Bounded Low-Criticality Service Influence in Mixed-Criticality SDV Control (SCI) (Under Review) IEEE Access, 2026.
Hyunjung Lee and Daejin Park. Double Blind Review (SCI) (Accepted) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2026.
Jaehyeon Park (M.S. Student @ KNU / Researcher @ NC&)
Brief Bio Sketch
Mr. Park received his B.S. degree in Embedded System Engineering at Daegu University, Republic of Korea in 2021. He is currently a master's course student in Convergence Software at Kyungpook National University, Daegu, Republic of Korea. His research interests span object detection speed behaviors across distinct video formatting layers and distance mapping using monocular deep camera streams. [Homepage] Google Scholar [About]
Kihyeon Seong (M.S. Graduate Student / Software Designer @ SL Advanced Convergence Engineering Center)
Brief Bio Sketch
Mr. Seong is with SL Advanced Convergence Engineering Center as a software designer, where he is responsible for developing BMS (Battery Management System) controller driver software for automotive ECUs. He primarily codes for Infineon's AURIX 2nd-generation TC375 and TC387 multi-core microcontrollers. He graduated with a B.S. degree in Computer Control Engineering in 2012. His academic research centers on AUTOSAR, functional safety, and statistical lightweight cell imbalance detection. [Homepage] Google Scholar [About]
Selected Publications
Kihyeon Seong and Daejin Park. Implementation of a Statistical Lightweight Algorithm-Based Battery Cell Imbalance Detection on Tricore MCU for Automotive BMS (KCI) Journal of the Korea Institute of Information and Communication Engineering, 2026.
Kihyeon Seong and Daejin Park. Implementation of a Statistical Lightweight Algorithm-Based Battery Cell Imbalance Detection on Tricore MCU for Automotive BMS In 2026 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2026) (Under Review), 2026.
Hoseung Kim (Integrated Ph.D. Course Student)
Brief Bio Sketch
Mr. Kim is currently pursuing an integrated Ph.D. degree in Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea. His research interests include designing low-power and high-speed microcontroller architectures, specialized accelerators, parallel processing data paths, and multi-bank systolic arrays utilizing planarized matrix reordering stages. [Homepage] Google Scholar
Selected Publications
Hoseung Kim and Daejin Park. Low-Power High Speed CNN Accelerator with Matrix Reordering Techniques for Small Footprint Memory Access In IEEE ICAIIC 2025, 2025.
Hoseung Kim and Daejin Park. Low Power CNN Accelerator Memory Interface with Small Footprint Memory Access In IEEE COOLChips 2025, 2025.
Hoseong Kim and Daejin Park. Data Allocation Rearrangement on CNN Accelerator based on Reshaping Systolic Tile Array using Planarized Matrix Reordering Techniques In IEEE MCSoC 2025, 2025.
Janghun Lee (Combined Graduate Student (M.S.))
Brief Bio Sketch
Mr. Lee is currently pursuing his graduate degree in Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea. His research focuses on efficient, reliable, runtime Over-The-Air (OTA) update frameworks, encompassing Software OTA (SOTA) via dynamic libraries, isolated container updates using Docker volumes, cryptography-backed secure in-vehicle pipelines, and binary translation runtime configurations from RISC-V to ARM contexts. [Homepage] Google Scholar
Selected Publications
Janghun Lee and Daejin Park. Fast and Intermittent Embedded Software Management based on Dynamic Partial Update Techniques for Intelligent AI-Driven Systems (KCI) Journal of the Korea Institute of Information and Communication Engineering, 29(3):420-431, 2025.
Janghun Lee and Daejin Park. Docker based Embedded Software Management and Update with Dynamic Library Techniques IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW 2025), 2025.
Janghun Lee and Daejin Park. Tail Service Delay Mitigation for On-Demand Execution Module Streaming in Cloud-Edge Systems (SCI) (Accepted) IEEE Embedded Systems Letters, 2026.
Jaeyoung Kim (Combined Graduate Student (M.S.) / R&D Engineer @ Hanwha Systems)
Brief Bio Sketch
Mr. Kim is currently with Hanwha Systems R&D department as a system/software engineer, researching Rule-based TEWA (Threat Evaluate & Weapon Assign) systems on Land Weapon configurations. He received his B.S. degree in Electrical & Electronic Engineering at Yonsei University, Seoul, Republic of Korea in 2019. He is pursuing his M.S. graduate degree in Electronics Engineering at Kyungpook National University. His academic interest tracks AI-driven TEWA engines on Integrated Vetronics Systems for counter-UAS missions. Google Scholar
Selected Publications
Hyunjae Kim (Combined Graduate Student (M.S.))
Brief Bio Sketch
Mr. Kim is pursuing his graduate degree in Electronics Engineering at Kyungpook National University, Daegu, Republic of Korea. His research interests focus on embedded processors, computer architecture, parallel/concurrent design, and hardware/software co-design. He has engineered RISC-V setups, FPGA/RTL blocks, and direct sparse LiDAR streaming accelerator topologies for profile-adaptive cruise control (ACC). Google Scholar
Selected Publications
Hyunjae Kim and Daejin Park. A Metadata-Guided Direct Sparse LiDAR Streaming Architecture for Profile-Adaptive CPU-Accelerator Co-Designed ACC In IEEE APCCAS 2026, 2026.
J. W. Jo (M.S. Student)
Brief Bio Sketch
Mr. Jo concentrates his studies on embedded System-on-Chip integration pipelines, digital circuit design using hardware description languages, hardware-software co-design, and memory access scheduling optimizations for simultaneous multi-tasking neural network accelerators. Google Scholar
Selected Publications
Jiwon Jo and Daejin Park. Compact CPU-Integrated CNN Acceleration Architecture by Streamlining Memory Access for Concurrent Neural Processing In IEEE COOLChips 2026, 2026.
Junyeong Choi (Undergraduate Student (B.S.))
Brief Bio Sketch
Mr. Choi is currently pursuing his undergraduate degree in Electronic Engineering at Kyungpook National University, Daegu, Republic of Korea. His research focuses on low-power, always-on keyword spotting (KWS) systems, combining adaptive FFT log-mel front-ends, hierarchical control loops, lightweight scout networks, and tiny Depthwise Separable CNN (DS-CNN) structures to save memory and power. Google Scholar
Selected Publications
Junyeong Choi and Daejin Park. Sparse Scout Monitor-based Soft-Gated Scheduling for Always-On Keyword Spotting (KCI) Journal of the Korea Institute of Information and Communication Engineering, 2026.
Junyeong Choi and Daejin Park. Low-Power Always-On Keyword Spotting with Adaptive FFT and Hierarchical Control (Under Review) In 2026 IEEE Global Conference on Consumer Electronics (GCCE 2026), 2026.
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